1. Field of the Invention
The present invention relates to a crystal oscillator. More particularly, the present invention relates to a low voltage crystal oscillator configured with low power dissipation.
2. Description of the Related Art
There is shown in FIG. 1, a conventional Pierce-type oscillator having an input terminal XTAL-in, an output terminal XTAL-out, and an inverter 10 disposed therebetween. The inverter 10 is connected in parallel to a quartz crystal XTAL and a resistor R. The conventional oscillator pads on an integrated circuit (not shown in the drawing) by the input terminal XTAL-in and the output terminal XTAL-out. The inverter 10 includes a P-channel MOS transistor P0 and an N-channel MOS transistor N0, both gates of which are connected to the input terminal XTAL-in. The P-channel transistor P0 is configured with a source connected to a voltage source Vdd, and a drain tied to the drain of the N-channel transistor N0 as the output terminal XTAL-out. The N-channel transistor N0 has its source connected to ground. For parallel resonance, an input capacitor Cin and an output capacitor Cout are provided at the input terminal XTAL-in and the output terminal XTAL-out, respectively.
Power dissipated by the oscillator is proportional to three factors: operating frequency, capacitances of the capacitor Cin and Cout, and V2 where V denotes the voltage across the quartz crystal XTAL. For minimizing the power dissipation, major design concern focuses on the voltage across the quartz crystal XTAL because the operating frequency and the capacitances are established. However, voltage swing at the output terminal XTAL-out of the conventional oscillator is Vdd so that the a great amount of power is dissipated thereby.
U.S. Pat. No. 5,486,795 discloses a low power crystal oscillator, an improvement of the conventional Pierce-type oscillator as shown in FIG. 2. Such a low power crystal oscillator further includes a load device and a switch. The load device is constituted by a diode-connected N-channel MOS transistor N1, which is configured with a gate and a drain tied together to the voltage source Vdd, and a source connected to the source of the P-channel transistor P0. The switch can be a P-channel MOS transistor P1 configured with a source connected to voltage source Vdd, a drain connected to the source of the P-channel transistor P0. The voltage at the gate of the transistor P1 is set to xe2x80x9c0xe2x80x9d on powering up, and set from xe2x80x9c0xe2x80x9d to xe2x80x9c1xe2x80x9d by a delay device D1 after a period of time is elapsed.
The improved crystal oscillator further includes a clamping device and another switch. The clamping device is constituted by a diode-connected P-channel MOS transistor P2, which is configured with a gate and a drain tied together to the ground, and a source connected to the source of the N-channel transistor N0. The other switch can be an N-channel MOS transistor N2 configured with a source connected to the ground, a drain connected to the source of the N-channel transistor N0. The voltage at the gate of the transistor N2 is set to xe2x80x9c1xe2x80x9d on powering on, and set from xe2x80x9c1xe2x80x9d to xe2x80x9c0xe2x80x9d by a delay device D2 after a predetermined time is elapsed.
As above, the N-channel transistor N1 and the P-channel transistor P2 are diode-connected transistors for providing predetermined voltage drop, Vtn and |Vtp|, respectively. Thus, the voltage swing at the output terminal of the quartz crystal XTAL can be decreased to about Vdd-|Vtp|-Vtn and thus power dissipation can be reduced. However, because the load device and the clamping device is implemented by means of diode-connected transistor each having a constant voltage drop of about 0.6Vxcx9c0.7V. the voltage difference between nodes D and E remains at about 0.4V so that AC voltage gain is decreased when Vdd is about 1.8V. Therefore, such oscillators are not suitable for low voltage operation.
The same approach by diminishing the voltage swing at the output terminal of the quartz crystal to decrease power dissipation is also disclosed in U.S. Pat. No. 5,545,941, and thus encounters the same issues.
Therefore, it is an object of the present invention to provide a low voltage crystal oscillator which is configured with low power dissipation.
For attaining the above-identified object, the present invention provides an oscillator having an inverter, a quartz crystal, a voltage source, an upper clamper, a ground node, a lower clamper, and a feedback-controlled switch. The inverter are connected in parallel to the quartz crystal having a crystal input and a crystal output. The upper clamper is connected between the inverter and the voltage source. The lower clamper is connected between the inverter and the ground node. The feedback-controlled switch has a pair of switch control nodes connected to the crystal input, a switch input connected to the crystal output, and a switch output connected to the upper clamper and the lower clamper. The potential at the switch output is determined by voltage levels at the switch control nodes and the switch input in order to control the upper clamper and the lower damper while oscillating.